ASIC Design for Test Engineer | Remote | Full-Time | $100000 - $160000 per year

Good2Go Recruiting is seeking a highly skilled and experienced ASIC Design for Test (DFT) Engineer to join a dynamic customer team in Austin, TX. In this critical role, you will be responsible for the architecture and implementation of robust DFT solutions for both block-level and chip-level ASIC designs. Your expertise will be crucial in developing test timing constraints, generating and simulating test patterns, and ensuring that appropriate test coverage metrics are met.

This position offers a fantastic opportunity to work on cutting-edge ASIC projects and contribute significantly to the quality and reliability of complex designs. You will collaborate closely with cross-functional teams, leverage advanced DFT tools, and play a key part in the successful execution of the product lifecycle. If you are a proactive engineer with a passion for innovation and a proven track record in DFT, we encourage you to apply.

• Architect and implement Design for Test (DFT) solutions for block and chip-level ASIC designs.
• Develop and validate test timing constraints for DFT applications.
• Generate and simulate test patterns to ensure comprehensive test coverage.
• Assure appropriate test coverage metrics are achieved and reported.
• Collaborate with design teams to integrate DFT strategies into the ASIC development flow.
• Utilize and manage a range of internal and third-party DFT tools.
• Perform Static Timing Analysis (STA) to validate test timing requirements.
• Validate generated test patterns using logic simulation tools.
• Contribute to DFT architecture for large-scale System-On-Chip (SOC) designs.
• Work closely with customer teams to understand and meet their specific DFT needs.
• Troubleshoot and resolve DFT-related issues during the design and verification phases.
• Maintain clear and concise documentation of DFT implementations and methodologies.

• Bachelor's or Master's degree in Electrical or Computer Engineering.
• 5+ years of experience as an ASIC engineer.
• Proven experience with Design for Test (DFT) concepts including scan, scan compression, MBIST, BSCAN, and macro test development.
• Experience with various internal and 3rd-party DFT tools.
• Demonstrated experience with Static Timing Analysis (STA) for test timing validation.
• Proficiency in using logic simulation tools for test pattern validation.
• Strong understanding of digital/microprocessor design, computer architecture, and VLSI design.
• Excellent interpersonal and communication skills.
• U.S. Citizenship or U.S. Permanent Residency required due to ITAR regulations.

• Immediate vesting in 401(k) plan with 10% employer contribution.
• Generous Paid Time Off (PTO).
• Two medical insurance plan options with employer contribution to HSA.
• Two dental insurance plan options with 100% paid premium for basic plan.
• Free vision coverage.
• Basic life insurance fully paid by employer.
• Option to purchase voluntary life insurance.
• Short- and long-term disability insurance fully paid by employer.